Deep Dive: Anthropic's Performance Take-Home (The One Claude Beat Humans At)
I'll pull the source article so the paragraphs stick to real names, numbers, and mechanics rather than inventing details.**Anthropic** open-sourced its…
By Dillip Chowdary • Aug 04, 2026 • Source: HN Claude/Codex/Fable
I'll pull the source article so the paragraphs stick to real names, numbers, and mechanics rather than inventing details.**Anthropic** open-sourced its original performance engineering take-home on GitHub under **anthropics/original_performance_takehome**. The assignment is to speed up a kernel on a custom **VLIW SIMD** processor simulator. The baseline runs in **147,734 cycles**. **Claude Opus 4.5** cut that to **1,487 cycles**, about a **99x** speedup, and beat most human candidates. Tristan Trouwen’s write-up (trirpi) walks through the simulator and the work that produces those numbers.
The machine is a **single-core VLIW SIMD** design where the programmer packs instruction bundles instead of relying on runtime hardware scheduling. Each cycle can dispatch up to **12 scalar ALU** ops, **6 vector ALU** ops (each **8** lanes), **2 loads**, **2 stores**, and **1 flow** op, for a theoretical **60** arithmetic ops per cycle if every slot is filled. Compute only touches **1,536** words of scratch; main memory is behind those load/store limits, so bandwidth often dominates. The workload is batched tree traversal with hashing: tree height **10** (**2,047** nodes), batch **256**, **16** rounds (**4,096** steps). Each hash is **6** stages and **18** ALU ops, in the style of a Bob Jenkins mix. The baseline deliberately puts one op per bundle, which is why it is so slow; real speedups come from VLIW packing, SIMD over the batch, software pipelining across items, and branchless **select** to avoid serial control flow on the dependency chain from hash to next tree index.
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For engineers, this is a concrete kernel-scheduling problem, not a leetcode toy. You have to reason about instruction-level parallelism, memory port pressure, and data dependencies the same way you would when writing GPU shared-memory code or hand-scheduling VLIW/DSP work. The simulator also ships Perfetto-style traces and non-cycle-counted debug compares, so iteration looks like real performance work: change the schedule, measure cycles, inspect stalls.
In market terms, Anthropic is publishing the same bar it used to hire performance people, and a frontier model already clears a result that beat most humans on that bar. That raises the standard for what “agent can do performance engineering” means in public: not generic coding, but cycle-counted kernel optimization on a constrained architecture. It also gives outsiders a shared benchmark to compare models and human candidates on the same artifact instead of private interview folklore.
Practical takeaway: clone the repo, beat the one-op-per-bundle baseline with real packing and vectorization, and treat cycle count as the only score. Watch whether later models push past **1,487** cycles on the same harness, and whether other labs open similar machine-level take-homes so the comparison is not Anthropic-only.
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