IBM Unveils 2nm Dual-Architecture Mainframe Chip Supporting Arm and IBM Z Workloads

IBM has announced a dual-instruction-set mainframe chip built on a 2nm node to bridge modern cloud microservices with legacy enterprise systems.

IBM has unveiled its next-generation enterprise mainframe processor, manufactured on a state-of-the-art 2nm EUV process node.

The chip features a hybrid core design capable of running Arm v9 instructions and IBM z/Architecture commands side-by-side on hardware-level execution threads.

This dual capability enables financial institutions to run modern containerized Arm microservices alongside mission-critical z/OS transaction ledgers without virtualization penalties.